boundary scan
Also known as: JTAG, IEEE 1149.1
Manufacturing ProcessesTest methodology using on-chip logic to verify connections without physical probe access.
Definition
Boundary scan (IEEE 1149.1, commonly called JTAG) is a test methodology where ICs include built-in test logic that can control and observe pin states through a serial interface. This enables testing interconnections between chips without physical probe access - essential for fine-pitch BGAs where probe access is impossible. Boundary scan can detect open and short circuits, verify correct component orientation, and even program flash devices. For PCB designers, boundary scan requires: JTAG signals (TCK, TMS, TDI, TDO, optional TRST) routed to a test header, proper termination, and daisy-chain connection between boundary-scan devices. Include JTAG access even on production boards for field diagnostics.